indirect address

processor An addressing mode found in many processors'

instruction sets where the instruction contains the address

of a memory location which contains the address of the operand

(the "effective address") or specifies a register which

contains the effective address. In the first case

(indirection via memory), accessing the operand requires two

memory accesses - one to fetch the effective address and

another to read or write the actual operand. Register

indirect addressing requires only one memory access.

An indirect address may be indicated in assembly language by

an operand in parentheses, e.g. in Motorola 68000 assembly

MOV D0,(A0)

writes the contents of register D0 to the location pointed to

by the address in register A0.

Indirect addressing is often combined with pre- or post-

increment or decrement addressing, allowing the address of the

operand to be increased or decreased by one (or some specified

number) either before or after using it.

(1994-11-07)