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Computing (FOLDOC) dictionary
instruction scheduling
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The compiler phase that orders instructions on a
pipelined, superscalar, or VLIW architecture so as to
maximise the number of function units operating in parallel
and to minimise the time they spend waiting for each other.
Examples are filling a delay slot; interspersing
floating-point instructions with integer instructions to
keep both units operating; making adjacent instructions
independent, e.g. one which writes a register and another which
reads from it; separating memory writes to avoid filling the